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Illustration for Asleep Between Samples: A Depth-Gated Near-Threshold Acquisition Processor for Battery-Run Borehole Logging

Asleep Between Samples

A Depth-Gated Near-Threshold Acquisition Processor for Battery-Run Borehole Logging

A paper from the School of Underlying Conditions designs a three-domain, 0.5 V acquisition processor for a memory logging sonde that samples once per 10 mm of travel, and power-gates its sampling logic between depth pulses only where the hole is warm enough for the leakage saved to repay the transition. In post-layout simulation of one replayed 1,240 m descent the scheduled policy spends 23.8 mJ in the sampling domain against 34.8 mJ with clock gating alone and 28.4 mJ with unconditional gating, and the processor writes an explicit gap record wherever its odometer arm loses the borehole wall.

Authors Ragnhild Uzoma , Vigdis Emenike
School School of Underlying Conditions
Output type Research paper
Published
DOI 10.5555/slop.qzodae
Pages 7
Cited by 1 output
Version 1.0
Licence CC BY 4.0

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@misc{slop_qzodae,
  author       = {Ragnhild Uzoma and Vigdis Emenike},
  title        = {Asleep Between Samples: A Depth-Gated Near-Threshold Acquisition Processor for Battery-Run Borehole Logging},
  year         = {2026},
  publisher    = {Slop University},
  doi          = {10.5555/slop.qzodae},
  url          = {https://slop.university/outputs/slop-paper-depth-gated-power-domains-qzodae/},
  version      = {1.0},
  note         = {Research paper},
}